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oEncoder Class Reference

An encoder which counts transitions on two adjacent TPU channel(s). Supports both quadrature and single channel. More...

#include <oencoder.h>


Public Member Functions

 oEncoder (IOLINE prim, uint8 subclass=0)
 compatible with old oEncoder object.

 oEncoder (bool quad, IOLINE prim, IOLINE sec, uint8 subclass=0)
 compatible with oEncoderQuadrature object.

 oEncoder (IOLINE prim, uint8 subclass=0)
 compatible with old oEncoder object.

 oEncoder (bool quad, IOLINE prim, IOLINE sec, uint8 subclass=0)
 compatible with oEncoderQuadrature object.

bool value (CHANNEL_TYPE c=PRIMARY_CHANNEL) const
 Return value on channel.

ENCODER_MODE_TYPE mode (void) const
 Return which mode operating in.

void set (word)
 Sets the internal counter.

void reset (void)
 set count to 0

void operate (bool oper)
 True activates the channel/transition counter; otherwise returns 0.

void priority (PRIORITY)
 Sets the TPU channel execution priority (Ref. TPU Channel Utilization). Default LOW_PRIORITY.


Static Public Member Functions

int TCR1 (void)
void TMCR (int iarb)
bool HSQR (int chan, int val)
 Configures the host sequence register.

bool HSRR (int chan, int val)
 Configures the host sequence request register.

bool CPR (int chan, int val)
 Configures the channel priority register (Ref. TPU Channel Utilization).

bool CIER (int chan, int cie)
 Configures the channel interrupt enable register.

int CISR (int chan)
 Returns the channel interrupt status register.

void CISR_clear (int chan)
 Clears the channel interrupt status register for the channel.

bool TICR (int cirl, int cibv)
 Configures the TPU interrupt configuration register.

int tpu_vector (IOLINE channel)
 Given a channel, returns the vector number to use for an interrupt.


Friends

class oDI4_TPU
class oDI3_TPU
class oDI2_TPU


Detailed Description

An encoder which counts transitions on two adjacent TPU channel(s). Supports both quadrature and single channel.

Operation
Provides quadrature encoding on two TPU channels using the Fast Quadrature Decode TPU function (FQD). The default priority is low, be sure to change it to high priority for wheel encoder type applications. Also supports single channel encoder operation. Read the Motorolla notes on FAST_MODE carefully; my impression is FAST_MODE does not double resolution by combining channels, but simply reads the primary channel ignoring the secondary, but increments by 4 for every transition thus preserving the same encoder transition count between NORMAL_MODE and FAST_MODE--its use allows for a a very high speed encoder. Also, note there is no check for overflowing/underflowing the counter.
Warning:
Don't accidentally use the value method when you mean to use the count method! I've done it twice now.
Sample Code
#include <hardware/oencoder.h>
oEncoder Lencoder(5);
int main()
{
int Lcount;
  while (true) // infinite loop
  {
    Lencoder.priority(HIGH_PRIORITY);
    Lcount = Lencoder.count();
    if (Lencoder.count() < 100)
    {
      // do something...
    }
    else
      Lencoder.reset();
  }
}


Member Function Documentation

bool CIER int  chan,
int  cie
[static, inherited]
 

Configures the channel interrupt enable register.

Parameters:
int: channel
int: 1 enables; 0 disables

bool CPR int  chan,
int  val
[static, inherited]
 

Configures the channel priority register (Ref. TPU Channel Utilization).

Parameters:
int: channel
int: priority

bool HSQR int  chan,
int  val
[static, inherited]
 

Configures the host sequence register.

Parameters:
int: channel
int dependent upon function (CFSR) selected

bool HSRR int  chan,
int  val
[static, inherited]
 

Configures the host sequence request register.

Parameters:
int: channel
int: dependend upon function

int TCR1 void   )  [static, inherited]
 

misnomer--should be TCR1 divisor--return number of clocks (PSCK,TCR1P modifications) Globally available object. Can be used in combination with TPU_REGISTER definition to say TPU_REGISTER->CFSR.BITS...

void TMCR int  iarb  )  [static, inherited]
 

was tpu_init Configures the channel function select register


The documentation for this class was generated from the following files:
Generated on Mon Oct 8 19:32:45 2007 for OOMRM Hardware API by doxygen1.3