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oomrm.h

/*
Object Oriented Mobile Robot Model (OOMRM) C++  Library Copyright (C) 2002-2005  Derek Jones

This library is free software; you can redistribute it  and/or
modify it under the terms of the GNU Lesser General Public
License  as published by the Free Software Foundation; either
version 2.1 of the  License, or (at your option) any later version.

This library is  distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY;  without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A  PARTICULAR PURPOSE.  See the GNU
Lesser General Public License for more  details.

You should have received a copy of the GNU Lesser General  Public
License along with this library; if not, write to the Free  Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA   02111-1307  USA

$Id: oomrm.h,v 1.2 2007/06/10 22:41:28 derek Exp $ 
*/
#ifndef _OOMRM_H
#define _OOMRM_H
#include "sim_regs.h"
#include <utility/status.h>
#include "oprocessor.h"
#include "otpu.h"
#include "oqsm.h"
#include "ovbr.h"
/* system clock */
#define FCRYSTAL                32768L
#define SYSCLK (FCRYSTAL * 4 * (((((*(word *) 0xfffa04) >> 8) & 0x3f) + 1) << (((*(word *) 0xfffa04) >> 14) & 0x3)))
//#define SYSCLK        ((FCRYSTAL*4*(SYSCLK_Y + 1)*(1<<(2*SYSCLK_W + SYSCLK_X))))
#define SPIBAUD(baud) (((SYSCLK >> 1)+((long)(baud)/2))/(baud))
//#define qspidivider(baud) (((SYSCLK >> 1)+((long)(baud)/2))/(baud))
//#define SPIBAUD(x) (SYSCLK/(2*(long)x))
#ifdef DOS
#define SCIBAUD(x)  (x)
#else
#define SCIBAUD(x)  (SYSCLK/(32*x))
#endif
#define DEFAULT_BAUD 19200
/*
// Interrupt priority levels
All on-chip peripherals are assigned an interrupt request level from zero to seven.
Seven is the highest priority, one is the lowest, and zero disables any interrupt requests.
*/
// TPU has high speed devices UARTs (bluetooth) and encoders.
#define OOMRM_TPU_LEVEL  6
// Other Serial communication come next.
#define OOMRM_QSPI_LEVEL 5
#define OOMRM_SCI_LEVEL  4
// PIT Usually used for scheduler task switching--hardware (SCI/SPI/UART(TPU)) should be higher priority.
#define OOMRM_PIT_LEVEL  3
/*
// Arbitration Levels
The same interrupt priority level can be assigned to more than one module. For example,
the TPU and the QSM can both be assigned interrupt level five. If both the TPU
and the QSM interrupt the CPU simultaneously, then the interrupt arbitration (IARB)
fields in the respective module configuration registers determine which module is serviced
first.
The IARB field is essentially a second-level priority in case of a tie. Each module that
has an interrupt priority level also has an IARB field. Each module must be assigned
a unique non-zero IARB value, or operation is undefined when interrupts with the
same priority level are issued simultaneously.
IARB fields contain four bits. An IARB value of %1111 is the highest arbitration priority,
%0001 is the lowest, and %0000 disables interrupt arbitration. Whereas zero in the interrupt
priority level field disables a module from requesting an interrupt, a zero in the
IARB field disables a module from acknowledging its interrupt request. If a module with
a non-zero interrupt priority field and a zero IARB field requests an interrupt, the CPU
sees a spurious interrupt, because the module requesting the interrupt service never
confirms that it made the request.
*/
#define DEFAULT_PIT_IARB        4
#define DEFAULT_TPU_IARB        0xE

#define SCI_QUEUE_SIZE  160
#define RX     0
#define TX     1
// I should probably reconsider all the global constants here; nice to say "#include <hardware/oomrm.h> and it will include
// everything, but sometimes the interrupt C routines need these requiring to "shut off" C++ constructs.
#ifdef __cplusplus



#ifdef DOS
class OOMRM :
 public oTPU
#else
class OOMRM :  
 public oVBR,
 public oProcessor,
 public oQSM,
 public oTPU
#endif
{
public:
  OOMRM();      
//  static oRedLED RedLED;
//  static oGreenLED GreenLED;
#ifdef DOS
//  static TPU_T* TPU_BASE;
  static TPU_T* TPU;
  static SIM_T* SIM;
  static QSM_T* QSM;
#endif
};
#endif
#endif

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